The SN74ACT596 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel open-drain outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH) for cascading. When the output-enable (OE) input is high, the outputs are in a high-impedance state. Internal register data is not impacted by the operation of the OE input.
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| 电源 | |
|---|---|
| Supply current (max) (µA) | 2 |
| 交流 / 直流特性 | |
| Clock frequency (MHz) | 92 |
| 环境与封装 | |
| Operating temperature range (°C) | -40 to 125 |
| 其他 | |
| Bits (#) | 8 |
| Configuration | Serial-in |
| Features | Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode |
| Input type | Standard CMOS |
| IOH (max) (mA) | -24 |
| IOL (max) (mA) | 24 |
| Output type | Open-drain |
| Rating | Catalog |
| Technology family | ACT |