Capacitive PGAs in Precision ADC Sensor Interfaces

1 Common mode as a practical gain constraint

Strain gauges and temperature sensors often produce signals too small to use the full ADC input range directly. A PGA increases their amplitude, but internal node swing also limits the available gain. This becomes particularly important when the sensor common mode approaches either supply rail.

A conventional resistive instrumentation amplifier sets gain with a resistor network while maintaining the high input impedance needed by sensors. Its internal outputs, however, move around the input common-mode level. Higher gain brings these nodes closer to the supply limits. Resistor mismatch and temperature drift also contribute to the error budget.

Figure 1 Gain network and internal common-mode behavior of a resistive PGA

A further buffer stage may be required after the resistive PGA to drive the modulator with sufficient bandwidth. Resistor value, power, and bandwidth are interdependent, so gain alone cannot determine the interface design. Raising or shifting the supply rails, or rebiasing the sensor common mode, can ease the constraint at the cost of additional circuitry, power, and expense.

2 Why a high dynamic range ADC still needs a quiet front end

Sigma-delta ADCs are widely used with sensors that have small output voltages and narrow bandwidths. Oversampling spreads quantization noise over a wider frequency range, reducing the fraction within the measurement band. Assuming a white noise spectrum, doubling the oversampling ratio improves dynamic range in a fixed band by approximately 3 dB.

Figure 2 Quantization noise density at different sampling frequencies

Noise shaping pushes more quantization noise toward high frequencies. A subsequent digital low-pass filter suppresses noise outside the wanted band. Together, these mechanisms allow the sigma-delta architecture to achieve very low in-band noise.

Figure 3 Moving quantization noise to higher frequencies through sigma-delta noise shaping

Figure 4 The measurement band after digital low-pass filtering

A higher internal sampling rate also shortens acquisition time and increases the bandwidth required of the input buffer. Sensors require high input impedance to limit loading. An integrated buffer simplifies the interface, but its thermal noise, low frequency flicker noise, and offset can still limit the signal chain.

Figure 5 Flicker noise and the thermal noise region of a buffer

Calibration can compensate for static offset, but temperature changes undermine that correction when drift is appreciable. A drift of 500 nV/°C produces a 5 μV change over 10°C. For a 24-bit ADC with a ±2.5 V input range, this is about 16.8 LSB, or a code span on the order of four bits.

3 Combining chopping with capacitor ratio gain

Input chopping translates the wanted signal to a higher frequency. The amplifier's own offset and flicker noise remain at low frequencies because they do not pass through the input modulation. Synchronous output demodulation returns the signal to baseband while translating the amplifier errors to the chopping frequency, where low-pass filtering can suppress them.

Figure 6 Different effects of modulation and demodulation on the signal and amplifier noise

A capacitive PGA uses this sequence to amplify dc: chop, amplify, and demodulate. Gain is determined by capacitor ratio, with G = C2/C1 in Figure 7. The internal common mode can be held at midsupply while the capacitor network decouples it from the input common mode, allowing sensor bias and internal operating point to differ.

Figure 7 Simplified capacitive PGA with capacitor ratio gain setting

The architecture reduces the required amplifier stages and resistive noise sources, improving the noise versus power trade-off. Gain-setting capacitors offer matching and temperature stability advantages and avoid the resistor self-heating mechanism, benefiting offset, gain error, and drift. These advantages do not imply that the complete capacitive PGA is noiseless.

Common-mode decoupling can also improve common-mode rejection, power-supply rejection, and distortion. The input common-mode range of the relevant architecture can reach the rails and, in some implementations, extend beyond them. This broadens the gain choices near supply boundaries, subject to the specified input limits and ratings of the actual device.

4 Bridge excitation and dynamic range

The common mode of a Wheatstone bridge depends on its arm impedances and excitation voltage. Electronic scales use the topology for strain sensing; Figure 8 shows a Type II half bridge. The source gives 2 mV/V as a typical strain-gauge sensitivity. Increasing excitation raises the output signal and can improve SNR.

Figure 8 Strain-gauge bridge interface for an electronic scale

With the ADC powered from 3.3 V, resistive PGA common-mode limits constrain bridge excitation. A capacitive implementation can permit a higher value. Table 1 retains the source's same-gain half-bridge example: excitation increases from 3.3 V to 6 V, the differential signal rises from 3.3 mV to 6 mV, and dynamic range improves by about 5.2 dB. These are values for the stated bridge example, rather than a universal conversion for every strain gauge.

Table 1 Bridge example with a 3.3 V ADC supply

Ground differences between a remote bridge and its ADC can shift the input common mode further and reduce the gain available from a resistive PGA. Raising the bridge supply or using a bipolar supply, such as ±3.3 V, is one conventional remedy, but adds power-supply complexity and consumption.

5 Gain headroom in RTD and thermocouple measurements

An RTD such as a PT100 can measure temperature directly or sense the cold-junction temperature of a thermocouple. Figure 9 illustrates the thermocouple and cold-junction arrangement. The following RTD connections show how common-mode placement affects precision acquisition.

Figure 9 Thermocouple measurement with cold-junction temperature sensing

A three-wire RTD is a common compromise between wiring cost and lead compensation. In Figure 10, two matched currents produce lead-voltage errors that can cancel. Small excitation currents limit self-heating but also create small lead-voltage drops, leaving the input common mode near the negative rail. A capacitive PGA maintains a suitable internal common mode and can accommodate higher gain under these conditions. The illustrated arrangement also allows the third lead to be grounded near the RTD, reducing wiring back to the ADC board.

Figure 10 Three-wire RTD connection with matched excitation currents

For higher temperature measurement accuracy, a four-wire ratiometric connection can be used. A single current passes through the RTD and a precision reference resistor. The resistor generates the ADC reference voltage, reducing dependence on the absolute excitation current. The maximum RTD voltage should be matched to VREF divided by PGA gain.

Figure 11 Four-wire ratiometric RTD measurement using a precision reference resistor

In the source's 3.3 V example, the resistive arrangement uses approximately 1.65 V for the reference to satisfy common-mode conditions. The capacitive arrangement accommodates a sensor common mode closer to the rail and permits a 2.5 V reference. For a Class B PT100 at a maximum of 600°C with excitation limited to 500 μA, the maximum resistance is 313.7 Ω and the voltage is 156.85 mV. Table 2 gives approximate voltage-ratio gain limits, rather than a list of selectable device gain settings.

Table 2 Gain comparison for four-wire ratiometric PT100 measurement

6 Design implications

The capacitive PGA combines gain setting, low frequency error reduction, and common-mode control. Capacitor matching and temperature stability benefit accuracy, while common-mode decoupling can reduce the need to rebias sensors or add supply rails. Bridge measurements and near-rail temperature signals can therefore use greater gain and dynamic range. Relevant ADCs identified in the source include the AD7190, AD7124-4, and AD7124-8.