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Technical parameters

Key specs

Input voltage3 ~ 6 V
Output voltage3.3 VTyp: 3.3 V (TJ=25°C,VIN=5 V),Tolerance: -2.5% to 2.5% (4 V ≤ VIN ≤ 6 V,0 ≤ IL ≤ 3 A,-40°C ≤ TJ ≤ 125°C)
Output current3 AMax
Switching frequency280 ~ 700 kHzFixed: 350 kHz (FSEL ≤ 0.8 V,RT open) or 550 kHz (FSEL ≥ 2.5 V

Datasheet-verified parameters

21 items
ParameterValue and test conditionsSource
Input voltage rangeMin: 3 V, Max: 6 V
Output voltageTyp: 3.3 V (TJ=25°C, VIN=5 V); Tolerance: -2.5% to 2.5% (4 V ≤ VIN ≤ 6 V, 0 ≤ IL ≤ 3 A, -40°C ≤ TJ ≤ 125°C)
Output currentMax: 3 A (Continuous)
Switching frequencyFixed: 350 kHz (FSEL ≤ 0.8 V, RT open) or 550 kHz (FSEL ≥ 2.5 V, RT open); Adjustable: 280 kHz to 700 kHz
PackageHTSSOP (20) PWP
Operating temperature-40°C to 85°C
RoHSRoHS & Green
Halogen FreeGreen (Chlorine and Bromine based flame retardants meet JS709B low halogen requirements of <=1000ppm)
Quiescent currentTyp: 6.2 mA, Max: 9.6 mA (fs=350 kHz, FSEL ≤ 0.8 V, RT open); Typ: 8.4 mA, Max: 12.8 mA (fs=550 kHz, FSEL ≤ 2.5 V, RT open, Phase pin open)
UVLO Start threshold voltageMin: 2.95 V, Max: 3.0 V
UVLO Stop threshold voltageMin: 2.70 V, Typ: 2.80 V
VBIAS Output voltageMin: 2.70 V, Typ: 2.80 V, Max: 2.90 V (IVBIAS=0)
Line regulationTyp: 0.21 %/V (IL=3 A, 350 ≤ fs ≤ 550 kHz, TJ=85°C)
Load regulationTyp: 0.21 %/A (IL=0 A to 3 A, 350 ≤ fs ≤ 550 kHz, TJ=85°C)
Maximum duty cycleTyp: 90%
Minimum controllable on timeMax: 200 ns
Absolute Maximum Input VoltageMin: -0.3 V, Max: 7 V (VIN, SS/ENA, SYNC)
Absolute Maximum Operating Junction TemperatureMin: -40°C, Max: 125°C
Storage temperatureMin: -65°C, Max: 150°C
Junction-to-ambient thermal resistanceTyp: 26.0 °C/W (with solder on PowerPad); Typ: 57.5 °C/W (without solder on PowerPad)
Protection FeaturesPeak Current Limit, Thermal Shutdown, Undervoltage Lockout
All parameters (21)ExpandCollapse
Power
Current - Output3A
Voltage - Input (Max)6V
Voltage - Input (Min)3V
Voltage - Output (Max)-
Voltage - Output (Min/Fixed)3.3V
AC and DC characteristics
Frequency - Switching350kHz, 550kHz
Environment and package
Mounting TypeSurface Mount
Operating Temperature-40°C~85°C(TA)
PackageTape & Reel (TR); Cut Tape (CT); Digi-Reel®
Package / Case20-PowerTSSOP (0.173", 4.40mm Width)
Supplier Device Package20-HTSSOP
Other
Base Product NumberTPS54316
FunctionStep-Down
MfrTexas Instruments
Number of Outputs1
Output ConfigurationPositive
Output TypeFixed
Product StatusActive
SeriesSWIFT™
Synchronous RectifierYes
TopologyBuck

Pinout and package

PWP Package 20-Pin HTSSOP Top …
PWP Package 20-Pin HTSSOP Top …
Package: HTSSOP (20) PWP
PinNameFunctionSource
1AGND: Analog ground. Return for compensation network/output divider, slow-start capacitor, VBIAS capacitor, RT resistor and FSEL pin. Make PowerPAD connection to AGND.
2VSENSE: Error amplifier inverting input. Connect directly to output voltage sense point.
3NC: No connection
4PWRGD: Powergood open-drain output. Hi-Z when VSENSE ≥ 90% Vref, otherwise PWRGD is low. Note that output is low when SS/ENA is low or internal shutdown signal active.
5BOOT: Bootstrap input. 0.022-μF to 0.1-μF low-ESR capacitor connected from BOOT to PH generates floating drive for the high-side FET driver.
17VBIAS: Internal bias regulator output. Supplies regulated voltage to internal circuitry. Bypass VBIAS pin to AGND pin with a high quality, low ESR 0.1-μF to 1.0-μF ceramic capacitor.
18SS/ENA: Slow-start/enable input/output. Dual function pin which provides logic input to enable/disable device operation and capacitor input to externally set the start-up time.
19FSEL: Frequency select input. Provides logic input to select between two internally set switching frequencies.
20RT: Frequency setting resistor input. Connect a resistor from RT to AGND to set the switching frequency, fs.
11-13PGND: Power ground. High current return for the low-side driver and power MOSFET. Connect PGND with large copper areas to the input and output supply returns, and negative terminals of the input and output capacitors.
14-16VIN: Input supply for the power MOSFET switches and internal bias regulator. Bypass VIN pins to PGND pins close to device package with a high quality, low ESR 1-μF to 10-μF ceramic capacitor.
6-10PH: Phase input/output. Junction of the internal high and low-side power MOSFETs, and output inductor.

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