Results forCD4094B

19 parts

Product search results19 total

  • CD4094B

  • CD4094B

    Gates and Inverters

    8位移位寄存器/3 态输出缓冲器

  • CD4094BE

    Shift Registers

    IC BUS REGISTER 8STAGE 16-DIP

  • CD4094BCN

    Shift Registers

    IC REGISTER/LATCH 8BIT 3ST 16DIP

  • CD4094BPW

    Shift Registers

    IC SHFT/STORE BUS REGSTR 16TSSOP

  • CD4094BNSR

    Shift Registers

    IC SHIFT/STORE BUS REGSTR 16SO

  • CD4094BPWR

    Shift Registers

    IC BUS REGISTER 8STAGE 16-TSSOP

  • CD4094BD

    Shift Registers

    8-STAGE SHIFT-AND-STORE BUS REG

  • CD4094BD

    Shift Registers

    CD4094BD

  • CD4094BD3

    Shift Registers

    8-STAGE SHIFT-AND-STORE BUS REG

  • CD4094BD3

    Shift Registers

    CD4094BD3

  • CD4094BEE4

    Shift Registers

    CMOS 8-STAGE SHIFT-AND-STORE BUS

  • CD4094BF/3

    Shift Registers

    8-STAGE SHIFT-AND-STORE BUS REG

  • CD4094BF/3

    Shift Registers

    CD4094BF/3

  • CD4094BF3A

    Shift Registers

    CD4094B-MIL CMOS 8-STAGE SHIFT-A

  • CD4094BNSR

    Shift Registers

    此款移位寄存器专为串行至并行数据转换设计,支持3V到15V的宽泛工作电压范围,适用于多样化的电子设备。其三态输出类型确保了在连接其他元件时的兼容性和灵活性,尤其适合复杂电路布局。该组件能够在极端温度下稳定工作,从-40°C至125°C,使其成为户外或条件苛刻的应用场景中的理想选择。它能够高效处理数据流,特别适用于需要精确控制和高速数据传输的环境,如信号处理与通信系统中。

  • CD4094B-MIL

    Shift Registers

    CD4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock transitions. The data in each shift register stage is transferred to the storage register when the STROBE input is high. Data in the storage register appears at the outputs whenever the OUTPUT-ENABLE signal is high. Two serial outputs are available for cascading a number of CD4094B devices. Data is available at the Q S serial output terminal on positive clock edges to allow for high-speed operation in cascaded systems in which the clock rise time is fast. The same serial information, available at the Q' S terminal on the next negative clock edge, provides a means for cascading CD4094B devices when the clock rise time is slow. The CD4094B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

  • CD4094BE-NG

    Shift Registers

    PROTOTYPE

  • CD4094BM/TR

    Shift Registers

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