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LP2995

LP2995

Производится

The LP2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2995 also incorporates a V SENSE pin to provide superior load regulation and a V REF output as a reference for the chipset and DDR DIMMS.

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Полный отчёт

Технические параметры

Условия эксплуатации и корпус
Operating temperature range (°C)0 to 125
Другое
DDR memory typeDDR
FeaturesNo external resistors
Iq (typ) (mA)0.25
Product typeDDR
RatingCatalog
Vin (max) (V)5.5
Vin (min) (V)2.2
Vout (max) (V)1.26
Vout (min) (V)1.21

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